发明名称 MATRIX CIRCUIT
摘要 PURPOSE:To perform the adjustment of amplitude and phase of an input signal independently, by applying delayed chroma signal and direct chroma signal to respective inputs of three pairs of differential amplifiers for addition and subtraction processing. CONSTITUTION:When a delayed chroma signal Fn' or a direct chroma signal Fn+1 is given to the base of a transistor (TR)Q5 polarity inversion signals -Fn', -Fn+1 are outputted to the collector, and noninversion signals Fn', Fn+1 are outputted from the collector of a TRQ4. Thus, the output of Fn'-Fn+1=-Fn-Fn+1= -FA is obtained at the collector of the TRQ4 of the 1st differential amplifier 21 and the output of FA is obtained at the collector of the TRQ5. In the 2nd and 3rd differential amplifiers 22, 23, subtraction is made, the output of Fn'+Fn+1= -Fn+ Fn+1=-FS is obtained at the collector of TRs Q7, Q8 and the output of FS is obtained at the collector of TRsQ6, Q9.
申请公布号 JPS5715592(A) 申请公布日期 1982.01.26
申请号 JP19800090422 申请日期 1980.07.02
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 KASAGI YOSHITAKA
分类号 H04N9/67 主分类号 H04N9/67
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