| 摘要 |
PURPOSE:To reduce the quantity of a file without degrading the recording precision by recording only information of a changed signal. CONSTITUTION:The output of each element is decided at a logic simulation time, and outputs of changed elements are stored in an even table. Only values, times, identifiers of changed signals are recorded on the file while referring to contents of a table where the latest value of the signal in each part of a logic circuit is stored. By this system, the quantity of the file is reduced without degrading the recording precision. |
