| 摘要 |
PURPOSE:To enhance the density of charge transfer elements by forming 1 bit of 3 transfer stages, fixing the surface vicinity of the first stage to a substrate potential, and driving the second and the third stages via gate electrodes with two-phase clock signals. CONSTITUTION:An N-type buried channel region 2 is formed on one main surface of a P-type semiconductor subsrtate 1, and a plurality of shallow P-type regions 3 are formed at the prescribed interval on the channel region 2. An N-type layer 4 is formed under the respective regions 3. An insulating film 5 is formed on the overall surfaces of the regions 2 and 3. Further, the first and the second gate electrodes 6 and 7 are alternately arranged toward the transferring direction of signal charge and are thus covered on the film 5. Two-phase clock voltages are applied to the electrodes 6 and 7, and the regions 3 are fixed simultaneously to the potential applied to the substrate 1. |
