| 摘要 |
PURPOSE:To facilitate sharing a memory and changing the system and reduce the processing work of a processor, by modifying addresses, which are output from a data processing device, by modification addresses. CONSTITUTION:A processor inputs address data composed of modification addresses to a latch circuit 7 through a data bus DBA and supplies latched modification addressed to an adder 6. Next, a selecting signal SEL is output, and selecting circuits 2 and 3 are instructed to select the data bus DBA and an address bus ABA. After that, since the processor outputs addresses to the address bus ABA successively according as the data processing progresses, addresses modified by an address generating circuit 4 are output to access a memory 1. |
