发明名称 RECEIVING CIRCUIT FOR SWITCH CLOSING SIGNAL
摘要 PURPOSE:To prevent chattering with simple circuit constitution by providing one piece of counter for generating carrier pulses which is kept reset during the period when chattering is occuring, commonly to all the switch circuits in a receiving circuit used for receiving switch closing signals. CONSTITUTION:When one of switches SW0-SW15 is pushed and the counting of a counter CNT1 reaches the depressed switch number, a multiplexer MPX put outs an output to an output terminal T1, thereby allowing a counter CNT2 to start counting. Whereas, during the chattering period, the input from the depressed switch to MPX repeats 0 1 0 ... and therefore the output terminal T1 stops outputting immediately. If the period from the start of counting of the counter CNT2 until carry pulse generation is made longer than the chattering period, the carry pulse is outputted after ending of the chattering and a central control unit CC receives this and reads out the depressed switch number stored by CNT1 into the register REG. Hence, the chattering of all the switches is prevented by one chattering preventing circuit.
申请公布号 JPS56155434(A) 申请公布日期 1981.12.01
申请号 JP19800059076 申请日期 1980.05.02
申请人 FUJITSU LTD 发明人 SETO FUMIAKI
分类号 G06F3/023;G06F3/02;H04L25/02;H04Q9/00 主分类号 G06F3/023
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