发明名称
摘要 PURPOSE:To prevent the channel inversion of the semiconductor element and to obtain an accurate buried gate therein by forming an n-type compensating layer on an i or n<->-type layer before diffusing a p<+>-type buried layer, superimposing an n-type compensating layer under predetermined conditions thereon and then forming an n-type layer. CONSTITUTION:The n<->-type layer 2 and compensating n-type layer 10a are grown by continuous vapor phase growth on an n<+>-type Si substrate 1, an SiO2 film 3 is coated thereon, openings 3a are selectively perforated thereat, and a p<+>-type layer 4 is diffused therein. An SiO2 film 5 produced when diffusing it is removed, and the second compensating n-type layer 10b and n-type layer 6 are formed by continuous vapor phase epitaxial grown. At this time the layer 4 is diffused in an n-type layer 10b. The layer 10b is formed in a plane yz at 1,100 deg.C and 1,200 deg.C for vapor growing temperatue, and the conditions contained in the region formed with a curved surface including accumulation gas flow y=0.9(l/min) in a plane zx, diffusing surface density z=1X10<19>/ cm<3> in a plane xy and a point A (1,100, 0.9, 8X10<19>)-K(1,150, 1.35, 1X10<19>) in the curved plane. This configuration can not almost occur channel inversion between the buried layers 4, and there can be obtained a buried gate having high reproducibility with high reliability as designed.
申请公布号 JPS5643605(B2) 申请公布日期 1981.10.14
申请号 JP19790099134 申请日期 1979.08.04
申请人 发明人
分类号 H01L29/80;H01L21/205;H01L21/74 主分类号 H01L29/80
代理机构 代理人
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