发明名称 DIGITAL SIGNAL RECORDING SYSTEM
摘要 PURPOSE:To obtain a format strong against dropout, by getting the parity combination in the oblique direction. CONSTITUTION:Data words S1, S2, S3-S3n encoded to a digital code are distributed to the i-th, the (i+k)-th, and the (i+2k)-th tracks in time series, and vertical-direction parity words P1, P2-Pn are arranged on the (i+3k)-th track. Frame synchronizing code FS is provided at the beginning of the frame, and the error detection code, which is called cyclic code CRCC, having the same number of bits as the data word is provided at the end of the frame. Further, parity words obtained by combining successively respective data words of frames D1-D27 at intervals of two frames on recording tracks adjacent to one another are inserted to Q1-Q9. As a result, the distance between combined words becomes large effectively, and a format strong against dropout is obtained.
申请公布号 JPS56124108(A) 申请公布日期 1981.09.29
申请号 JP19800025588 申请日期 1980.02.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TSUJI SHIROU;MATSUSHIMA KOUJI;SHIMEKI TAIJI;KIHARA NOBUYOSHI;KATOU MISAO
分类号 H03M13/00;G11B20/12;G11B20/18 主分类号 H03M13/00
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