| 摘要 |
PURPOSE:To reduce counting elements and input gates in number by NANDing the output of the (n)-th and (n-1)th counting elements among (n) counting elements connected in series and then by returning the output of the NAND operation to the 1st counting element. CONSTITUTION:The output of FF22 and that of FF23 and NANDed at 25 and the output is returned to the input of FF21. For example, when the outputs of FFs 21- 23 are held at ''0'', ''1'' and ''1'', respectively and pulse P1 is supplied to terminal 24, the outputs of FFs 21-23 are held at ''0'', ''0'' and ''1'', respectively. On arrival of pulse P2, those outputs are held at ''1'', ''0'' and ''0'' and, in response to pulse P3, at ''1'', ''1'' and ''0''. With pulse P4, the outputs of FFs 21-23 are held at ''1'', ''1'' and ''1'' and, with the next pulse P5, at ''0'', ''1'' and ''1'', which are the original states, so that a 1/5 counting circuit is obtained. |
