| 摘要 |
PURPOSE:To reduce a noise without causing a stationary time lag, by adding a correction corresponding to the difference between the signal and the output signal prior to 1 sampling period and outputting the signal, in case when the difference exceeds the constant value. CONSTITUTION:The input signal, that is to say, the output e01 of the zero-th holding circuit of the sampling system is inputted to the subtraction circuit 13, in order to obtain the difference between said output and the output e16 whose output signal e03 has been delayed by 1 sampling period by the delay circuit 16. The output e13 of the subtraction circuit 16 is inputted to the amplitude control circuit 14, and when it is within the specified range centering around zero, it is outputted as it is, and on the other hand, if the output e13 is out of the range, it is controlled to the value which is within the specified range, and is outputted. The output e14 of the amplitude control circuit 14 and the output of the delay circuit 16 are inputted to the adder circuit 15, and the output signal e03 is outputted. |
