发明名称 Logical circuit having bypass circuit
摘要 The logical circuit includes therein a logic block for performing a logical function. The logic block is connected with the selection circuit and the selection circuit selects the input signals thereto in response to the selection signal. The input terminals of the logic block are connected with a bypass circuit and the bypass circuit transmits the input signals applied to the input terminals of the logic block to the selection circuit. When the selection signal takes the selected one of the values, the input signals to the logic block are bypassed through the bypass circuit, without being passed through the logic circuit, and delivered as the outputs of the selection circuit.
申请公布号 US4286173(A) 申请公布日期 1981.08.25
申请号 US19790022949 申请日期 1979.03.22
申请人 HITACHI, LTD. 发明人 OKA, YUICHI;TAKIGUCHI, YOSIMITSU
分类号 G01R31/3185;H03K19/173;(IPC1-7):H03K19/00;H03K17/00;H03K13/32 主分类号 G01R31/3185
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