| 摘要 |
<p>PURPOSE:To extract receiving clocks stably, by causing the change point of delay clocks to function as the change point of receiving data, which disappeared, substitutionally when change point information of receiving data disappeared. CONSTITUTION:Receiving data RDATA is input to differentiating circuit 1 and has change point information extracted. The output signal of undesired pulse mask circuit 2 is input to one input of phase comparator 3, and the output of voltage control oscillator 5 is input to the other. Receiving clocks RCLK which are the output of oscillator 5 are so adjusted that they have a proper phase difference for output DEFO of the differentiating circuit by delay line 7. The output of delay line 7 is masked in AND gate 8 by output signal SYND of synchronization leading-in detecting circuit 6. Only DEFO is input by circuit 2 till completion of synchronization leading-in, and DEFO and delay clock DCLK are turned off and input by gate 9 after completion.</p> |
