| 摘要 |
<p>The object of the circuit is to provide solid state digital damping between the transmit and receive functions of a two way data transmission link. Two assemblies of time delay elements are employed, connected to the transmission cable (KL). For the receive circuit (E1) these comprise passive delay elements (V1,V2,.. Vn-2,Vn-1) connected in series. Similar elements, which may be active, (V'1, V'2,..V'n-2,V'n-1) are provided for transmitter (S1). The elements of the latter are connected through high output impedance amplifiers (SV1,....SVn) to corresponding points on the receiving delay line (K1). The delay of each unit corresponds to one half of a single bit transmission time. When transmitting the receiver (E1) part of the circuit obtains a signal damped to 1/n of the voltage level of a digital high, or one, pulse whilst the transmitted pulse is of unit value. Incoming pulses are blocked from the transmitter (S1) by the amplifiers (SV1,...SVn), and summed to the correct level by the receive delay line.</p> |
