| 摘要 |
PURPOSE:To enable the write-in/readout of data of two types of clock rates continously and to perform refresh control, by forming the data write-in/readout cycle through the use of a given clock to the same memory. CONSTITUTION:The data write-in/readout receives control from the level of the signal 21 at a clock generator 18, the write-in/readout cycle in data clock rate 1MHz at high speed side is formed by using the clock rate of 9MHz from an oscillator 19, the readout for the observation of picture from a memory 7 is made at high speed in 1MHz, and the write-in of data in lower speed than the readout is made by using the remaining period used for the readout in the relation of signal 20 and 21. Accordingly, 9-word, 72-bit of memory 7 at high speed readout can parallelly be Accessed, and the readout/write-in can continuously be made to the memory 7 and this state can be observed by a monitor 12. |
