| 摘要 |
PURPOSE:To guarantee the covery operation and elevate the reliability of a data processing unit without deteriorating the performance in the course of execution of the firmware instruction, by dividing the firmware instruction into modules. CONSTITUTION:An instruction code is set to the control memory register CSR2 by reading out the microinstruction for indicating the start of execution of the instruction stored in the control memory CS1. A register code of this register 2 is selected by the register decoder DEC3, and it is provided to the AND gates 13, 14. The timings TP1, TR2 generated by processing unit are provided to said gates 13, 14, the logical product with an output of the decoder 3 is taken, and a signal for indicating the write operation of the address register 6 and the program counter 8, plus a signal for resetting the retry control FF9 which controls the reexecution of the instruction are output. And the software program instruction sequence by the processing unit is controlled by the counter 8 so that the covery operation can be executed without deteriorating the performance in the cource of execution of the firmware instruction. |
