发明名称 VERTICALLSYNCHRONIZINGGSIGNAL DETECTING CIRCUIT
摘要 PURPOSE:To extract a vertical synchronizing signal stably by driving the 2nd separating circuit after the 1st separating circuit and then by synchronizing a signal, obtained under control over the drive of the 2nd separating circuit, with a clock signal. CONSTITUTION:Video signal 22 is inputted to separating circuits I and II and the output of separating circuit I is inputted to comparator 24. The output of this comparator 24 is inputted to AND circuit 26 together with an output from output terminal Q' of monostable multivibrator 28, and the output of the AND circuit 26 to monostable multivibrator 28. Further, an output of output terminal Q of monostable multivibrator 28 is inputted to monostable multivibrator 30, and that from its output terminal Q to the base of transistor TR2; and further the common connection point between the collector of transistor TR3 of separating circuit I and that of transistor TR2 is connected to comparator 32, the output of which is inputted to delay circuit A, whose output is further inputted to AND circuit 38.
申请公布号 JPS5643876(A) 申请公布日期 1981.04.22
申请号 JP19790119098 申请日期 1979.09.17
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SATOU KENJI
分类号 H04N5/10;(IPC1-7):04N5/10 主分类号 H04N5/10
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