| 摘要 |
<p>The protection applies particularly to transistorised transmitter amplifiers in carrier frequency lines. The stabilised power supply (US) for the transmitter (SV) is provided by a controller (S2) and reference (SG) together with an overload protection circuit comprising a measuring resistor (MW) and time delayed trigger (Zd, Tr, Z2, S1) to reduce the stabilised voltage to zero in event of a fault. The level detector (B), checking the supply to the transmitter input (E) reduces the set level, should the supply collapse, and does not restore full set level until the voltage has again risen to the normal value. The arrangement serves to restore the transmitter to the condition existing prior to the fault. The circuit contains a setting transistor with a series measuring resistor and a Schmitt trigger. The D.C. at the resistor is used as the circuit criterion.</p> |
