发明名称 SIGNAL DISCRIMINATION CIRCUIT
摘要 PURPOSE:To obtain the discrimination output without time delay, by performing the signal discrimination with both side waves of the waveform of low frequency signal input. CONSTITUTION:The output terminal of the comparators CP1a, 1b is commonly connected, and the inverted input terminal of CP1a and the noninverting input terminal of CP1b are connected, and the power supply voltage Vcc is fed to the connecting point after being divided into a half with resistances RB1, RB2, and low frequency signal Vin is input via the capacitor C3. Further, the voltage Vcc is divided at the resistances RS1, RS2, RS3 of the same value, and the reference voltage UTL setting the upper limit threshold SH value is fed to the noninverting input of CP1a and the reference voltage LTL of lower limit SH value setting is fed to the inverting input of CP1b. The signal Vin is discriminated with the upper and lower limit values with the voltages UTL and LTL, and since the discriminated output Vout is made for the signal processing at the same time with the timing of the upper and lower limit values with the signal processing circuit 2, the discrimination output without time delay can be obtained.
申请公布号 JPS56749(A) 申请公布日期 1981.01.07
申请号 JP19790075899 申请日期 1979.06.15
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 KONDOU MIKIO
分类号 G01R19/165;H04B1/10 主分类号 G01R19/165
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