| 摘要 |
PURPOSE:To reduce fluctuation in a pulse width of a generated pulse signal generated from a pulse signal arrived at a predetermined period. CONSTITUTION:The circuit is provided with an MMV 1 triggered at a predetermined period T, an MMV 2 triggered at a tail end edge of an output pulse and whose output pulse width is shorter than that of the MMV 1 and in which the sum of the output pulse width of the MMV 1 and that of the MMV 2 is a T or an integral multiple of the T, a phase comparator means 5 comparing a phase of a trigger edge of the MMV 1 with a phase of the tail end edge of an output pulse of the MMV 2 and a pulse width control means controlling the pulse width of the MMV 1 with an output of the phase comparator means 5, which controls the sum of the output pulse of the MMV1, MMV2 to be always constant under said condition. |
