| 摘要 |
PURPOSE:To realize the high-speed reading by selecting the bit line group of the memory cell of matrix formation via the bit line group driver and the intragroup bit line via the bit line driver respectively. CONSTITUTION:The selection is given to the bit line groups composed of bit line B1 formed with two bit lines B1a and B1b which are selected by bit line group selecting driver BD2 and via load resistance R1 and R2 plus selection switch SW1 according to the output of current switch CS and bit line B2 formed with two bit lines B2a and B2b which are connected together with resistances R1 and R2 plus lines La1 and La2 and then selected by switch SW1 each. And bit lines B1 and B2 within the groups are selected via intragroup bit line driver BD1. Then memory cells M11, M21, M12, M22 and others are selected. The memory cells corresponding to other bit line groups are selected in the same way. In such constitution, both the length and the number of the bit lines to be connected are reduced for lines La1, La2, Lb1, Lb2 and others along with the floating capacity reduced. As a result, the high-speed reading is possible even for the high-density cell. |
