发明名称 OUTPUT CIRCUIT FOR MICROCOMPUTER
摘要 PURPOSE:To prevent the false operation of system controlled with a microcomputer in advance, by providing an output data register, output buffer gate and an exclusive OR gate as a comparison circuit. CONSTITUTION:If the value of an output data register 3A and that of an output terminal 5A are different, that is, if an output buffer gate 4A is is failure, the output of a logical product gate 8A is inverted to the logic level ''H'', with the provision of an exclusive logical sum gate 6A, inverter 7A and the logical product gate 8A. Accordingly, the logical sum output between the output of gate 8A and the logical product gate of each bit provided similarly with the gate 8A is taken as a signal for malfunction detection 9, and this signal 9 is used as the interruption input of a microcomputer or initial set input. In case of the former, the restorative operation for the malfunction is made with the interruption processing routine. Further, in the case of the latter, the microcomputer is set to an initial condition to prevent the malfunction of the control system controlling the microcomputer.
申请公布号 JPS55157022(A) 申请公布日期 1980.12.06
申请号 JP19790064423 申请日期 1979.05.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAKAO TAKASHI
分类号 G06F11/00;G06F3/00;G06F13/00 主分类号 G06F11/00
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