| 摘要 |
A memory device is provided for an integrated injection logic (I<2>L) device in solid state form by a resistor (11) connected at one end to the logic device (12, 18, 19, 20), and a diode (13, 14), having its cathode connected to the other end of the resistor (11) at a programming junction (48), and its anode connected to a common point (41). If the diode conductors are melted or deformed by reverse diode current from the programming junction to the common point, a low impedance path is formed, and the logic portion is provided with a first logic input. If the diode conductors are left unmelted or intact, the logic portion is provided with a second logic input. The diodes and logic transistor base-emitter junctions are poled for easy flow in the same loop sense. <IMAGE> |
