| 摘要 |
PURPOSE:To form a memory cell without using an isolation layer in a semiconductor memory by forming the memory cell only with a common base pnp transistor and a common emitter npn transistor forming an I<2>L element. CONSTITUTION:The emitters of pnp transistors Q14, Q13 are connected to work lines W, and the emitters of pnp transistors Q17, Q18 are connected to bit wires B0, B1. When holding information, an electric current is supplied from the transistors Q14, Q13 to npn transistors Q11, Q12, and when writing and reading the information, an electric current is supplied from one of the transistors Q17, Q18 to the transistors Q11, Q12. In this memory cell, the transistors Q11 and Q13, Q17 from first I<2>L, and the transistors Q12 and Q14, Q18 from second I<2>L. That is, the first and second I<2>L have two injectors. The first injector is connected to the word line W to supply an electric current when holding the information, and the second injector is connected to the bit lines B0, B1 to supply an electric current when writing and reading the information. |
