| 摘要 |
Circuitry for indicating the occurrence of a predetermined separation time between adjacent pairs of pulses in a sequence of pulses including a first counter having a first relatively high frequency clock signal applied thereto and the sequence of pulses applied to reset the counter for each pulse, a second counter having a relatively low frequency clock signal applied thereto with the second counter counting the total number of cycles from an initial or starting time, and comparators for comparing the number of cycles in the first counter to the number of cycles in the second counter and providing output signals when the comparison indicates that the separation time between adjacent pairs of pulses is within a predetermined range.
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