发明名称 Cross-tie memory system
摘要 Double complementary storage is provided for a single binary digit in a quad store cross-tie memory. A correlated double sampling signal processing system is used to increase data signal level and facilitate discrimination in cross-tie memories. A method is also provided for accomplishing write and read functions in a quad store cross-tie memory using only a single pulse for either function. A set of four memory elements, arranged in two row-aligned complementary pairs, stores a single data bit, and is under four column conductors for reading data, two row conductors, and a write conductor for writing data.
申请公布号 US4841480(A) 申请公布日期 1989.06.20
申请号 US19870107122 申请日期 1987.10.09
申请人 WESTINGHOUSE ELECTRIC CORP. 发明人 LAMPE, DONALD R.;MENTZER, MARK A.;NAVIASKY, ERIC H.
分类号 G11C19/08 主分类号 G11C19/08
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