| 摘要 |
PURPOSE:To obtain a compact GaAs IC capable of a high-speed operation by making the cross-sectional area of the load-resistance layer less than 60% of that of the FET channel. CONSTITUTION:Mesa active layers 6 are formed on GaAs on a substrate of highly resistant GaAs, the widths W1 and W2 of the layers 6 being W1<=0.6W2. The substrate is provided with ohmic electrodes 7-9, and a gate electrode 10 is formed between the electrodes 7 and 8. Due to its negative differential mobility, GaAs, even in the case of a two-terminal device, when an applied electric field is more than 3KV/cm, causes current to show a saturation characteristic similar to that of an active load by a Sochottky barrier J-FET. Making the cross-sectional area of the load-resistance layer less than 60% of that of the FET channel permits the saturation current of the load to be smaller than that of the FET, so that a device of a high voltage-gain, the pinch-off voltage of less than 5V, can be obtained at a high yield. The device can be made compact, and its operation is permitted to speed up. |
