发明名称 SYNCHRONOUS RECTIFICATION SYSTEM
摘要 PURPOSE:To remove harmonics components, by using an input signal and a synchronous signal synchronized with the period of the fundamental wave of the input signal to divide one half period into three equal portions and processing the portions. CONSTITUTION:Timing control signals S1, S2 are produced from synchronous pulses synchronized with an input signal ei to control the opening and closing of switches SW1, SW2. The switch SW1 is closed for the first half period of the input signal ei and opened for the second half period. The other switch SW2 is opened for the first one-sixth of the period of the input signal, closed for the second one-sixth of the period, opened for the following one-third of the period, closed again for the succeeding one-sixth of the period and opened again for the last one-sixth of the period. The ratio of the gain of an amplification circuit A2 for the duration of the opening of the switch SW2 to that for the duration of the closing of the switch is 1:2. An amplifier A1 has a gain of 1.
申请公布号 JPS55133684(A) 申请公布日期 1980.10.17
申请号 JP19790040580 申请日期 1979.04.04
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HARA YOSHIBUMI
分类号 H02M7/21;G01M1/22;H02M7/155 主分类号 H02M7/21
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