Stackable microelectronic package structures

摘要

A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements. A plurality of package terminals at the second surface are electrically interconnected with the substrate contacts for connecting the package with a component external thereto. A plurality of stack terminals are exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate. The assembly further includes a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package.

主权项

1. A microelectronic assembly, comprising:
a first microelectronic package and a second microelectronic package overlying the first microelectronic package, each of the first and second microelectronic packages including:
a substrate having first and second opposed surfaces, apertures extending between the first and second opposed surfaces, substrate contacts disposed at the first surface, and an interconnect area disposed at the first surface;first and second microelectronic elements each having element contacts facing the apertures and electrically connected with corresponding substrate contacts disposed at the first surface, the first and second microelectronic elements being spaced apart from one another by the interconnect area;a dielectric layer overlying the first and second microelectronic elements and the interconnect area;a plurality of package terminals at the second surface electrically interconnected with the substrate contacts for connecting the package with a component external to the package;a plurality of stack terminals disposed at the first surface and positioned within the interconnect area electrically connected with the package terminals; wherein conductive interconnects extend through the dielectric layer disposed within the interconnect area, the conductive interconnects being joined to the stack terminals of the first microelectronic package and the stack terminals of the second microelectronic package.