发明名称 MICROPROCESSOR CAPABILITY EXPANDER
摘要 A modular system comprising a microprocessor having a system bus (control address and data) and one or more programmed logic arrays connected to said system bus. Three system configurations are shown by way of example, Macroprocessor, Peripheral Input/Output and Direct Memory Access applications. The microprocessor executes a standard set of instructions and addresses each programmed logic array. Each array executes a specific instruction, beyond the standard set of instructions, upon receipt of its address.
申请公布号 JPS55115143(A) 申请公布日期 1980.09.04
申请号 JP19800010177 申请日期 1980.02.01
申请人 IBM 发明人 JIYOSEFU KAARU ROOGU;UEIIWA YU
分类号 G06F7/00;G06F9/22;G06F9/30;G06F13/12;G06F15/78 主分类号 G06F7/00
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