| 摘要 |
PURPOSE:To realize the digital multiplier with the circuit scale of about 3/4 by giving the multiplication to input X with dissolution into the higher-rank and lower- rank bits. CONSTITUTION:Input X sent from terminal 11 is divided into higher-rank bit X0 and lower-rank bit X1 through divider circuit 12. For bit X1, A1+KA0 is multiplied at multiplier 13. At the same time, X1 is added by X0 via adder 14, and the output undergoes the multiplication of A0 at multiplier 15. Then bit X0 is multiplied by A1-A0 by multiplier 16. The output of multiplier 15 undergoes the multiplication of -K at multiplier 17, and this output is added with the output of multiplier 13 through adder 18 to obtain output is added with the output of multiplier 13 through adder 18 to obtain output -KA0X0+A1X1=B. On the other hand, the output of multiplier 15 is added with the output of multiplier 16 at adder 19, and the multiplication of 2<b/2> is carried out via multiplier 21 to obtain (A0X1+A1+ X0)2<b/2>. Accordingly, AX is obtained if the output of adder 18 and multiplier 21 are added together through adder 22. |
