发明名称 ATHLETIC DATA PROCESSOR FEATURING ARITHMETIC FUNCTION
摘要 <p>PURPOSE:To increase the processing speed of the athletic data as well as secure the normal arithmetic process by providing the circuit which gives the arrangement to the athletic data in the order of their scores in addition to the arithmetic circuit. CONSTITUTION:The athletic data supplied to input circuit 50 are supplied to memory circuit 52 via switch circuit 58 to be memorized temporarily. And the data are arranged at register data file region 64 in the order of their scores and then delivered from print output region 66. Then print circuit 70 is driven to print the supplied several athletic data in the order of their scores. Then circuit 50 is connected to arithmetic circuit 54 via switching of switch circuit 58, the normal four rules of arithmetic becomes possible. In such way, a number of athletic data can be processed quickly, at the same time ensuring the operation for the average score or the like of the players.</p>
申请公布号 JPS5599669(A) 申请公布日期 1980.07.29
申请号 JP19790006754 申请日期 1979.01.23
申请人 OTSUKI NAOTO 发明人 OOTSUKI NAOTO
分类号 G06Q50/00;G06Q50/10;G06Q50/34 主分类号 G06Q50/00
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