发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce power consumption by decreasing the ineffective current in the logic control circuit at chip non-selection, by performing the power supply to the logic control circuit via the power switch controlled with the chip selection signal. CONSTITUTION:The unit 1 constituted with the complementary type MIS circuit provides the static type RAM2 and the logic control circuit 3, and the power supply voltage -VDD is directly fed to RAM2 and it is fed to the circuit 3 via the power switch Q. Further, the switch Q is controlled with the chip selection signal CE via the inverters IN1 and IN2. On the other hand, the word line selection circuit of RAM2 is controlled with the signal CE via the inverter IN2. Thus, the word line of RAM2 is compulsively made to non-selection state at chip non-selection. Further, the threshold voltage between IN2 and IN3 has a difference to make non-selection state the word line of RAM2 and then to turn off Q.
申请公布号 JPS5570987(A) 申请公布日期 1980.05.28
申请号 JP19780144206 申请日期 1978.11.24
申请人 HITACHI LTD 发明人 HARA HIDEO
分类号 G11C11/41;G11C5/14 主分类号 G11C11/41
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