| 摘要 |
PURPOSE:To enable large capacity and high-speed parallel synchronizing transfer by correcting the duty ratio of an optical signal and suppressing the scewness and jitter of a rise and a fall. CONSTITUTION:In an LD driving circuit 103, the reference voltage of a reference voltage control circuit 107 is adjusted each package by a control signal, the dispersion of the duty ratio for an input signal is reduced by compensating the pulse width of driving current and the synchronization at a high speed transfer is held. By a second control signal, bias current is set by conforming to the threshold current of an LD array in a bias current circuit 108, and the dispersion and scewness of oscillation delay time is reduced. Further, by a third control signal, the optical signal intensity of the LD array is made the same level by adjusting the control voltage of a power source circuit by a pulse current control circuit 109, and the scewness of a rise and a fall is reduced. Thus, a circuit configuration can be simplified, a parallel synchronizing transfer is enabled, and large capacity and superhigh speed transfer can be performed. |
