发明名称 DIGITAL SIGNAL DIFFERENTIATING CIRCUIT
摘要 PURPOSE:To obtain a simple-constitution and stable-operation circuit by determining the pulse width of a differentiation output signal by a one-circulation loop delay quantity of a FF, a NAND gate, etc., which constitute the circuit. CONSTITUTION:Inversion output signal 5 at output 20 of NAND 19 where signal 13 outputted from NAND 12 by input signal 1 and Q output 11 of FF 10 and signal 18 outputted from NAND 17 by anti-phase signal 16 of the input signal and inversion Q output 14 of FF 10 are inputted is inverted to an L state and becomes a differentiation output signal only for short time T at the leading edge and the trailing edge of input signal 1. Pulse width T of this signal is a one-circulation loop delay quantity of NAND 12, 19, FF 10, NAND 17, 19 and FF 10 and has a period enough to operate next-stage FF 10, and next-stage inverter 22 is operated surely.
申请公布号 JPS54162445(A) 申请公布日期 1979.12.24
申请号 JP19780070917 申请日期 1978.06.14
申请人 HITACHI LTD 发明人 KOBORI YASUNORI;ITOU SATOSHI
分类号 H03K5/04;H03K5/00;H03K5/1532 主分类号 H03K5/04
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