发明名称 GENERATING A PSEUDO-SIGNAL IN AN ERROR RATE SUPERVISORY UNIT
摘要 A method and circuit for generating a pseudo-error signal comprising a demodulator circuit for demodulating an input signal; a first discriminator circuit for regenerating a first digital data signal by discriminating the output of the demodulator circuit; a noise extracting means for extracting a noise component from the input signal; an adding circuit for adding the output of the noise extracting means and the output of the demodulator circuit; a second discriminator circuit for regenerating a second digital data signal by discriminating the output of the adding circuit, and; an exclusive OR circuit for recognizing whether or not the first digital data signal coincides with the second digital data signal.
申请公布号 AU4734579(A) 申请公布日期 1979.11.29
申请号 AU19790047345 申请日期 1979.05.23
申请人 FUJITSU LIMITED 发明人 HIROSHI KURIHARA;TADAYOSHI KATOH;SADAO TAKENAKA
分类号 H04L1/00;G06F7/58;H03K3/84;H04L1/24;H04L12/26;H04L27/00 主分类号 H04L1/00
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