| 摘要 |
<p>PURPOSE:To make easy the muPG control accompanied with failure state, by providing the means detecting the failure in the data processor and the means branching it to the specific microprogram muPG for failure state processing at failure detection. CONSTITUTION:The error such as parity and address over of the main memory 510 caused under data processing is detected with the memory error detection circuit 516, it is reported to the instruction fetch microprocessor muPC500, and the muPG counter 502 is cleared with the reset signal 5e. Thus, muPG designates the address 0 with the error processing circuit provided at muPC 500 and the error processing is started from here. If a failure is detected when the muPC 500 executes the fetching of next instruction, failure is judged by waiting the end of the instruction execution to start the muPG started from the address 0. Further, limited to the occurrence of failure under execution of fetching for the next instruction, until the instruction under execution is ended, the state of the instruction fetching section is frozen to the state of failure occurrence so that the cause to the failure can be studied.</p> |
