发明名称 SYNDROME GENERATOR CIRCUIT
摘要 PURPOSE:To obtain an integrated syndrome generator circuit which generates the syndrome from the information codes and error correction codes featuring different widths. CONSTITUTION:The exclusive logic sum is secured for information codes (D0, D1, D2, D3) via input terminal 3 as well as for error correction codes C2 and C3 via input terminal 4, switch circuit 1 and signal line 10 respectively. Then the exclusive logical sum operation is given between the above exclusive logical sum result plus error correction codes C0 and C1 applied via input terminal 5. Thus, syndrome codes S0 and S1 are delivered through output terminal 7, and at the same time syndrome S2 and S3 are delivered through output terminal 8 respectively. This operation features as S0=D0+D2+D3+C0, S1=D0+D2+D3+C1, S2=D1+ D2+C2 and S3=D2+D3+C3.
申请公布号 JPS54142955(A) 申请公布日期 1979.11.07
申请号 JP19780052133 申请日期 1978.04.27
申请人 NIPPON ELECTRIC CO;NIPPON TELEGRAPH & TELEPHONE 发明人 KOBAYASHI HIDEHIKO;IHARA HIROSHI;TAKAHASHI YUKIO;HAGIWARA NOBORU
分类号 G06F11/10 主分类号 G06F11/10
代理机构 代理人
主权项
地址