发明名称 |
INTEGRATED CIRCUIT DEVICE |
摘要 |
PURPOSE:To prevent a gate protection element from causing breakdown easily by making the interval between a protection circuit element and a high-density impurity region sufficient in the gate protection circuit of an integrated circuit. CONSTITUTION:Insulating gate FET 15 and transistor protection region 17 which prevents the destruction of this FET 15 are formed on N-type semconductor substance 14. Protection region 17 is connected between signal input terminal 16 and gate electrode 15a. Then, N-type high-density region 18 is formed around protection region 17. Interval C between regions 17 and 18 is made larger than interval D between FET 15 and region 18. Since interval D becomes very small in case that the device is constituted densely, C>D is defined because the dielectric strength of source 15s, drain 15D and substance 14 is lowered up to several 10V. |
申请公布号 |
JPS54134572(A) |
申请公布日期 |
1979.10.19 |
申请号 |
JP19780041766 |
申请日期 |
1978.04.11 |
申请人 |
TOKYO SHIBAURA ELECTRIC CO |
发明人 |
HIRASAWA MASATAKA;NAGAO KENICHI |
分类号 |
H03F1/52;H01L27/02;H01L27/06;H01L29/78;H03F1/42 |
主分类号 |
H03F1/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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