发明名称 MANUFACTURE FOR MOS TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To increase the dielectric strength performance, by making flat the element surface and by weakening the electric field between the gate electrode and the drain, through implanting thick insulation film at the part adjacent to the channel of the source and the drain region. CONSTITUTION:The SiO2 film 2 is coated on the P<-> type Si substrate 1, the opening 3 is made on the channel forming region of MOSFET, and the P type polycrystal Si layer having high impurity concentration than the substrate 1 is grown on the entire surface. Thus, the singlecrystal layer 4 is coated on the opening 3, the polycrystal layer 5 is produced on the film 2, the thin SiO2 film 8 is coated on the layer 4 and the thick SiO2 film 9 is coated on the layer 5, and the openings 6 and 7 are made on the film 9. Next, the N<+> type drain and source regions 11 and 12 are formed by depositing the N<+> type polycrystal film 10 on the entire surface and diffusing the impurity in it with heat treatment. After that, the entire surface is covered with the Si3N4 film 15, concaves 16 and 17 are provided at the both sides of the layer 4 with selective etching, heat treatment is made by taking the film 15 as a mask, the thick SiO2 films 18 and 19 are burried, and electrodes are respectively attached by removing the film 15.
申请公布号 JPS5490978(A) 申请公布日期 1979.07.19
申请号 JP19770157614 申请日期 1977.12.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 WATARI SHIGERU;ICHINOHE EISUKE
分类号 H01L29/78;H01L21/316;H01L27/12;H01L29/06;H01L29/08;H01L29/786 主分类号 H01L29/78
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