发明名称 FIXED MEMORY CIRCUIT
摘要 <p>PURPOSE:To make possible disconnection inspection over the entire bit prior to writing by forming memory cells in I<2>L structure. CONSTITUTION:When memory cells are formed in I<2>L structure, applying of a specified voltage to the control terminal INJ enables all of the elements Q1' thru Q4' assuming memory cells to be turned ON by the current from the p injector thereof even before writing. By ON and OFF of these elements, the presence or not of disconnection and connection defects may be inspected bit by bit through selection of word line W bit lines B. When the circut is used as a fixed memory circuit, the control terminal INJ is held at a reference voltage (OFF voltage of Q1' thru Q4'), then the circuit acts as an oridinary memory and therefore there are no incoveniences owing to addition of inspecting elements.</p>
申请公布号 JPS5471586(A) 申请公布日期 1979.06.08
申请号 JP19770137893 申请日期 1977.11.18
申请人 HITACHI LTD 发明人 OONO NOBUHIKO
分类号 G11C17/06;G11C17/00;G11C17/14;H01L21/331;H01L21/8226;H01L27/02;H01L27/082;H01L27/10;H01L29/73 主分类号 G11C17/06
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