| 摘要 |
PURPOSE:To prevent an operation from synchronizing mistake, by means of obtaining at least one of the frequencies f1, f2 from a frequency divider capable of reset operaction, when a speed of rotation of the motor is controlled by selectively switching a signal of the frequencies f1, f2 on the basis of synchronous control signal. CONSTITUTION:A synchronous control signal generator circuit 1 is constituted by a flip-flop, with a synchronous signal Rs at transmission side and a synchronous signals Ds at reception side inputted. And with a reference clock fo inputted, a pulse of frequency f1 is outputted from a frequency divider 21 and a pulse of frequency f2 from a divider 22, being inputted to an and gate AND1, AND2respectively with the synchronous control signal and its inverted signal, and a motor driving clock pluse will be obtained through an or gate OR1. Accordingly, with the divider 22 reset, at the time of a switching from f1 to f2, no continuation of motor driving clock pulse will be caused for a short length of time, thus capable of preventing a generation of synchronizing mistake. |
