| 摘要 |
<p>A method and an integrated nonvolatile memory circuit including circuitry for verifying the status of selected nonvolatile memory cells, such as during a memory erase or programming operation. Preferably, the invention employs simple logic circuitry (24) including a flip-flop (60') to assert successful verification data only in response to a continuous validity of a verification signal (RAW VERIFY OK) throughout a sampling period, thereby avoiding false assertion of successful verification data. An output signal (VERIFY OK) from the logic circuitry (24) indicates the state of the flip-flop (60') at the end of the sampling period. A level of the output signal (VERIFY OK) indicating that the flip-flop (60') is in the first state at the end of the sampling period is interpreted as successful verification data.</p> |
