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发明名称
ERROR CORRECTION ENCODER
摘要
PURPOSE:To correct the error within a frame and the bit error showing the dead line state the frame and the bit error frame within the frame synchronous signal for start-stop synchronous data communication system, by using a fold-in encoder.
申请公布号
JPS5374806(A)
申请公布日期
1978.07.03
申请号
JP19760151228
申请日期
1976.12.15
申请人
NIPPON ELECTRIC CO
发明人
KUKI TAKANORI
分类号
H04L1/08;G06F11/08;G06F11/10;H03M13/00;H03M13/23;H04B1/00
主分类号
H04L1/08
代理机构
代理人
主权项
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