发明名称 MOS INTEGRATED CIRCUIT
摘要 PURPOSE:From the diffusion layer at the grounding side of P or N-channel enhancement-depletion structured MOSIC, the normal voltage and opposite polarity bias are applied to the substrate, and a capacitance and high resistance layer are interposed between the substrate and grounding terminal to make the currents toward the groun small, so that the pattern designing will be simplified and the integration will be improved to obtain the high speed operation.
申请公布号 JPS5371587(A) 申请公布日期 1978.06.26
申请号 JP19760147522 申请日期 1976.12.07
申请人 MITSUBISHI ELECTRIC CORP 发明人 EBIHARA YUUJI
分类号 H01L27/04;H01L21/822;H01L27/088;H01L29/78 主分类号 H01L27/04
代理机构 代理人
主权项
地址