发明名称 |
Low power/high speed static ram |
摘要 |
An integrated circuit, metal-oxide-semiconductor (MOS) static random-access memory (RAM) with a power-down mode is described. The bistable memory cells employed in the memory include low conductivity, depletion mode transistors used as loads. "Zero" threshold voltage devices are employed on a low body-effect substrate to permit the powering-down of many circuits in the memory without affecting circuit performance. Several circuits employing these zero threshold devices are described.
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申请公布号 |
US4096584(A) |
申请公布日期 |
1978.06.20 |
申请号 |
US19770764031 |
申请日期 |
1977.01.31 |
申请人 |
INTEL CORPORATION |
发明人 |
OWEN, III, WILLIAM H.;KOKKONEN, KIM R.;PASHLEY, RICHARD D. |
分类号 |
G11C11/412;G11C11/417;(IPC1-7):G11C11/40 |
主分类号 |
G11C11/412 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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