发明名称 |
MASS STORAGE DYNAMIC RAM CELL |
摘要 |
Disclosed is a memory system capable of being integrated into a semiconductor substrate and having an array of Hi-C memory cells. The Hi-C cells are selectively addressable by row and column lines. Each cell of the array is comprised of a transistor having a source coupled to a bit line, a gate coupled to a word line, and a drain coupled to a node N. Node N is coupled in parallel to a dielectric capacitor and to a depletion capacitor. The dielectric capacitor and the depletion capacitor are constructed to have substantially the same charge capacity. |
申请公布号 |
JPS5368043(A) |
申请公布日期 |
1978.06.17 |
申请号 |
JP19770134531 |
申请日期 |
1977.11.09 |
申请人 |
TEXAS INSTRUMENTS INC |
发明人 |
ARU EFU TATSUSHIYU JIYUNIA |
分类号 |
G11C11/401;G11C11/35;G11C11/404;H01L21/8242;H01L27/10;H01L27/108 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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