| 摘要 |
The print data editing circuit permits prints data signals for odd pins (P1,P3,P9,P11,P17,P19) and other odd pins (P5,P7,P13, P15,P21,P23) in print data suppied from a buffer RAM to be sequentially shifted and stored in registers in response to a first write signal. Similarly, print data signals for even pins (P2,P4, P10,P12,P18,P20) and other even pins (P6,P8,P14,P16,P22,P24) are sequentially shifted and stored in other registers in response to a second write signal. The print data signals from the first through fourth registers are respectively latched by first through fourth buffer registers in response to an interrupt signal from a timer. The data signals are simultaneously output from the first through the fourth buffer register and supplied to a pin drive circuit.
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