发明名称 |
TIDSARRANGEMANG FOR EN INFORMATIONSREGISTRERINGSANLEGGNING |
摘要 |
Fixed and variable data bit position shifts in a memory system are compensated for by an adaptive readout strobe timing arrangement. One check bit transition per word is employed during readout to position the data bit stream relative to the recorded clock via an active shift register driven by an asynchronous external clock. The number of shift register cells through which each data word flows is determined digitally by a counter which measures the shift between the word check bit transition and a corresponding recorded clock bit. |
申请公布号 |
SE398016(B) |
申请公布日期 |
1977.11.28 |
申请号 |
SE19740003197 |
申请日期 |
1974.03.11 |
申请人 |
* WESTERN ELECTRIC COMPANY INCORPORATED |
发明人 |
J W * HOPKINS;R C * TOWNLEY;L * ZIMMERMAN |
分类号 |
G11B20/16;(IPC1-7):11B5/02 |
主分类号 |
G11B20/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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