发明名称 |
Priority vector interrupt system |
摘要 |
Vectored priority interrupt system utilizing a priority encoder which provides to the interrupted device, usually a processor, a coded signal denoting the highest priority device requesting an interrupt. The coded signals are transmitted to the interrupted device in response to a distinctive address signal provided by the interrupted device in response to an interrupt signal. Provision is also made to mask and to store the interrupt signals.
|
申请公布号 |
US4056847(A) |
申请公布日期 |
1977.11.01 |
申请号 |
US19760771450 |
申请日期 |
1976.08.04 |
申请人 |
RCA CORPORATION |
发明人 |
MARCANTONIO, ANGELO ROBERT |
分类号 |
G06F9/48;G06F13/26;(IPC1-7):G06F9/18 |
主分类号 |
G06F9/48 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|