发明名称 |
DC load current suppression in rectifier circuits - uses forced commutation path in parallel with load with thyristor capacitor and choke |
摘要 |
<p>The application is to circuits where the load current must be suppressed rapidly in the event of an overload, the d.c. power being supplied by a controlled rectifier (1). To achieve this a commutation circuit comprising a thyristor (31) in series with a capacitor (32) and choke (36) is connected to the anodes of the controlled devices (11, 12, 13) in the rectifier, and in parallel with the load (2). A reverse biased diode (21) may be connected across the load to assist the process. If an overcurrent is detected the commutating thyristor (31) is triggered, and discharges the capacitor into the load assisting the collapse of current therein, the load being virtually short circuited. Current is also shunted from the conducting main thyristor (11, 12 or 13) and the affected device ceases conduction.</p> |
申请公布号 |
DE2549019(A1) |
申请公布日期 |
1977.05.05 |
申请号 |
DE19752549019 |
申请日期 |
1975.11.03 |
申请人 |
LICENTIA PATENT-VERWALTUNGS-GMBH |
发明人 |
MUELLER,REINHOLD;WATERMANN,GREGOR;OFFERGELD,HELMUT,DIPL.-ING. |
分类号 |
H02H3/44;H02H7/127;(IPC1-7):H02H7/127 |
主分类号 |
H02H3/44 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|