发明名称 ALIGNER
摘要 PROBLEM TO BE SOLVED: To provide an aligner which improves the quality of a product chip and the operation of the aligner. SOLUTION: The aligner comprises a loaded/unloaded cassette 1 for product wafers only, a loaded/unloaded cassette 2 for superflatness wafers only and a controller which controls the transport part for starting the transport of the superflat wafer just after ending an exposure process of a wafer in the product wafer-only cassette, automatically computes the difference between focus positions at adjacent spots among focus positions values at spots on the superflat wafer surface, automatically determines whether any of these difference values exceeds an allowance and indicates measurement points which exceed the allowance on a display, so that an operator can see them at a glance.
申请公布号 JP2002164270(A) 申请公布日期 2002.06.07
申请号 JP20000359872 申请日期 2000.11.27
申请人 SEIKO EPSON CORP 发明人 FUKUDA HIROSHI
分类号 G03F7/207;H01L21/027;(IPC1-7):H01L21/027 主分类号 G03F7/207
代理机构 代理人
主权项
地址